FIG. 1 shows a structural schematic diagram of a segmented resistor string type digital to analog converter (DAC) in the prior art. In such conventional segmented resistor string type DAC, taking a 12-bit DAC as an example, upper 7 bits are called the most significant bits (MSBs), with 128 MSB resistors, and lower 5 bits are called the least significant bits (LSBs), with 32 LSB resistors. In practical applications, the number of bits for the MSBs may be selected from 4 to 8, and accordingly the number of bits for the LSBs may be selected from 8 to 4 bits, according to different requirements of a system. In a conventional segmented-type DAC, considering matching, a MSB resistor string and a LSB resistor string generally select resistors having the same resistance. In order to reduce influences of the LSB resistor string on the MSB resistor string, current compensation on the LSB resistor string or isolation of a front sub-DAC and a rear sub-DAC: by an operational amplifier is generally required, which requires additional circuits and increases design difficulties. In addition, a switch resistance between the MSB resistor string and the LSB resistor string of the segmented-type DAC may also seriously affect linearity. In order to improve differential nonlinearity (DNL), a switching mode of the switch needs to be optimized.
However, the DAC requires a larger number of transmission gate switches. How to reduce an area of the switches and parasitic effects also are problems to be considered in the design. Secondly, a switching mode of the switches is changed from simultaneous switching of two ends of the LSB resistor to alternate switching of the two ends each time. As shown in FIG. 2, the switches have an inherent resistor Rsw, and a voltage Vcd across the two ends of the LSB resistor string is not equal to a voltage Vab between points a and b of the MSB resistor string, thus when adjacent bits of the MSB resistor string are switched, if two switches are simultaneously turned on, there is a serious influence on differential nonlinearity (DNL) due to a part of voltage across the resistors of the switches themselves (influence caused by the two Rsw).
The technique in the prior art is suitable for applications where a power supply voltage does not significantly change. However, in many applications, the power supply voltage has a quite large changing range, and sometimes the power supply voltage may change in the range of 2V to 5V or lower or higher. When there is a low voltage and a low temperature and a transistor is at a slow process angle, since a threshold voltage of the transistor will increase significantly at the low temperature, which results in that when a middle-position switch of the MSB resistor string is turned on, an on-resistance Rsw will be very large, which will cause significant degradation to performance of the circuit. Simply increasing a width-to-length ratio of the transistor to reduce Rsw will result in a very large area of the switches and high costs.